The disclosure relates to a resistive memory device, and more particularly, to a resistive memory device including a multi-level cell and a method of operating the resistive memory system.
According to a demand for a high capacity and low power consumption of a memory device, research for next-generation memory devices that are non-volatile and do not require a refresh operation is being conducted. The next-generation memory devices are required to have a high integrity characteristic of a Dynamic Random Access Memory (DRAM), a non-volatile characteristic of a flash memory, and a high speed of a static RAM (SRAM). As the next-generation memory devices, a Phase change RAM (PRAM), a Nano Floating Gate Memory (NFGM), a Polymer RAM (PoRAM), a Magnetic RAM (MRAM), a Ferroelectric RAM (FeRAM), and a Resistive RAM (ReRAM) are being highlighted.